MicroTESK @ NGC 2017

Conferences
MicroTESK was presented at the Digital Design and Computer Architecture workshop, a part of the Nano and Giga Challenges in Electronics (NGC) conference held in Tomsk, Russia on September 18-22, 2017. It was a Russian-speaking forum divided into two tracks: a student school and a meeting on digital design education. Alexander Kamkin made a presentation at the second track. We think that MicroTESK is a good option for teaching computer design and verification. Here are some reasons for that. Test program generators (TPGs) are essential verification tools. MicroTESK is an open-source TPG, while other similar tools are closed. MicroTESK includes a set of pre-defined ISA specifications, e.g., MIPS. MicroTESK is being used in real-life CPU design projects.
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Templates and Revisions in MicroTESK

New Features
The recent MicroTESK build (2.4.34) supports two nML extensions that ease developing and maintaining ISA specifications: templates and revisions. Templates allow defining families of operations whose operands differ only in their data types. To describe an operation in a generic way, the following constructs have been introduced: type_of, size_of, and is_type. Here is an example. op cmd_B(op1: BYTE, ...) ... op cmd_D(op1: DWORD, ...) action = { ... } Revisions allows enabling/disabling ISA elements (registers, operations, etc.) depending on the current ISA version. In the example below, the cmd_v2 operation is enabled only when the CPU_V2 revision is turned on. @rev(CPU_V2) op cmd_v2(rd: REG, rn: REG) To define different versions of the same ISA element, the @rev construct can be applied to the element attributes (syntax, action, etc.). Here comes an example.…
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MicroTESK @ PSI 2017

New Features
MicroTESK was presented at the A.P. Ershov Informatics Conference (the PSI Conference Series, 11th edition) held in Moscow, Russia on June 27-29, 2017. We made the following presentation: A. Kamkin, A. Tatarnikov. MicroTESK: A Tool for Constrained-Random Test Program Generation for Microprocessors. PSI is the premier international forum in Russia for research and applications in Computer Science (CS) and Software Engineering (SE). PSI is held regularly since 1991. The conference brings together academic and industrial researchers, developers and users to discuss the most recent topics in the field. PSI provides an ideal venue for setting up research collaborations between the growing Russian CS/SE researcher community and its international counterparts, as well as between established scientists and younger researchers.  
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Sections in MicroTESK

New Features
As you may know, the GNU Assembler (GAS) as well as the ELF and COFF object file formats supports so-called sections. Section is a contiguous piece of code located at a specified memory address. Besides the starting address, each section is described with a number of attributes such as name, size, etc. The recent MicroTESK build (2.4.27) allows using sections in test templates. It supports two predefined sections: .data (constants and variables) and .text (executable code). Also, there is a possibility to define custom sections. Syntactically, sections are blocks that wrap data or code declarations. section_data(...) { # .data word 0, 1, 2 ... } section_text(...) { # .text sequence { add t0, t1, t2 ... }.run } section(:name => 'name', ...) { # .section name ... } Each section…
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MicroTESK’s x86 Demo

New Features
The recent MicroTESK build (2.4.17) contains the revisited x86 (8086) demo with the ISA specification and test templates illustrating the basic facilities of the tool. The build can be downloaded from the link below: http://forge.ispras.ru/…/microtesk-2.4.17-beta-170407.tar.gz Here is a brief explanation how to get started with the demo: http://forge.ispras.ru/…/micr…/wiki/Getting_Started_with_x86  
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MicroTESK @ DATE 2017

Conferences
MicroTESK together with a Spin-based extension for verifying cache coherency mechanisms was presented at the University Booth exhibition of the Design, Automation and Test in Europe Conference (DATE) held in Lausanne, Switzerland on March 27-31, 2017. DATE is the main European event bringing together designers and design automation users, researchers and vendors, as well as specialists in the hardware and software design, test and manufacturing of electronic circuits and systems.
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MicroTESK @ ISPRAS OPEN 2016

Conferences
MicroTESK for ARMv8 was presented at the ISPRAS OPEN Conference held in Moscow, December 1-2, 2016. A. Kamkin, A. Kotsynyak, A. Protsenko, A. Tatarnikov, M. Chupilko. MicroTESK-Based Test Program Generator for the ARMv8 Architecture. The ISPRAS Open Conference is the annual event organized by Institute for System Programming of the Russian Academy of Sciences.
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Open-Source MicroTESK for MIPS64

New Features
We are happy to announce that we made the MicroTESK for MIPS64 project open source. The package consisting of the MicroTESK core, the MIPS64 (Revision 6) specifications, and the basic test templates is distributed under the Apache License, Version 2.0, which implies the freedom to use the software for any purpose: to distribute it, to modify it, and to distribute modified versions of the software. Feel free to contact us if you have any questions. MIPS is a trademark of Imagination Technologies LTD.
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MicroTESK 2.4

New Features
We started a new version of MicroTESK, namely 2.4. Our goal is to support verification of microprocessors with multiple processing elements (PE). The main idea is to maintain several instances of instruction set simulator (ISS) resources during test program generation. Each instance is initialized according to the rules defined in the ‘instantiate’ operation. op instantiate(id: WORD) action = { Reg1 = Expr1(id); ... RegN = ExprN(id); } The number of instances used by the test program generator is set by the ‘instance-number’ option (by default, it is equal to 1). The MicroTESK distribution package can be downloaded from http://forge.ispras.ru/projects/microtesk/files.
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MicroTESK for MIPS64 @ CEE-SECR 2016

Conferences
MicroTESK for MIPS64 was presented at the Central & Eastern European Software Engineering Conference in Russia (CEE-SECR) held in Moscow, Digital October Center, October 28–29, 2016. Alexander Kamkin. Automated Development of Test Program Generators for Microprocessors on the Example of MIPS (in Russian). http://2016.secr.ru/lang/en/program/submitted-presentations/automated-development-of-test-program-generators-for-microprocessors-on-the-example-of-mips SECR is one of the brightest annual IT events in Russia. Over the years it has become one of the largest platforms for sharing experience, obtaining knowledge and networking. One of the important conference features is SECR scope. Software development process is considered in all its aspects: technologies, management, education, HR, business, etc.
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