MicroTESK @ NGC 2017

MicroTESK was presented at the Digital Design and Computer Architecture workshop, a part of the Nano and Giga Challenges in Electronics (NGC) conference held in Tomsk, Russia on September 18-22, 2017. It was a Russian-speaking forum divided into two tracks: a student school and a meeting on digital design education. Alexander Kamkin made a presentation at the second track. We think that MicroTESK is a good option for teaching computer design and verification. Here are some reasons for that. Test program generators (TPGs) are essential verification tools. MicroTESK is an open-source TPG, while other similar tools are closed. MicroTESK includes a set of pre-defined ISA specifications, e.g., MIPS. MicroTESK is being used in real-life CPU design projects.
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Templates and Revisions in MicroTESK

New Features
The recent MicroTESK build (2.4.34) supports two nML extensions that ease developing and maintaining ISA specifications: templates and revisions. Templates allow defining families of operations whose operands differ only in their data types. To describe an operation in a generic way, the following constructs have been introduced: type_of, size_of, and is_type. Here is an example. op cmd_B(op1: BYTE, ...) ... op cmd_D(op1: DWORD, ...) action = { ... } Revisions allows enabling/disabling ISA elements (registers, operations, etc.) depending on the current ISA version. In the example below, the cmd_v2 operation is enabled only when the CPU_V2 revision is turned on. @rev(CPU_V2) op cmd_v2(rd: REG, rn: REG) To define different versions of the same ISA element, the @rev construct can be applied to the element attributes (syntax, action, etc.). Here comes an example.…
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