MicroTESK for RISC-V 0.0.9 Released

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MicroTESK for RISC-V 0.0.9 has been released.

What’s New?

  • Specifications: Added system registers and the related modes
  • Specifications: Added sample specifications of some vector instructions (consistent with RISC-V “V” Vector Extension Version 0.7.1)
  • Specifications: Fixed bugs in RV64A instructions
  • Specifications: Fixed bugs in RV32{F,D} instructions (FEQ, FLE, and FLT)
  • Test Templates: Added sample test templates for vector instructions
  • Test Templates: Changed structure of directories
  • Test Templates: Fixed a Torture-like template (‘synthetics/rvxxx’)
  • Tool Functions: Moved branch data generators to TestBase
  • Test and Debug: Test suite uses QEMU4V 0.3.3

MicroTESK for RISC-V 0.0.9 can be downloaded from here.

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