The MicroTESK framework and the MicroTESK-based test suite for RISC-V microprocessors (so called RISC-V AVS) were presented at DVCon Europe (Design and Verification Conference and Exhibition) held in Munich, Germany on October 29–30, 2019.
- MicroTESK for RISC-V: https://forge.ispras.ru/projects/microtesk-riscv
- RISC-V AVS: https://github.com/ispras/riscv-avs
